Add ESP32 ROM SHA Hardware Acceleration to BearSSL (#23819)
* Add ESP32 ROM SHA Hardware Acceleration to BearSSL * USE_SHA_ROM by default for all esp32x variants --------- Co-authored-by: Jason2866 <24528715+Jason2866@users.noreply.github.com>
This commit is contained in:
Christian Baars
GitHub
parent
ba6177861a
commit
30f770ca4a
393
lib/lib_ssl/bearssl-esp8266/src/hash/_sha_rom_idf5x.c
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393
lib/lib_ssl/bearssl-esp8266/src/hash/_sha_rom_idf5x.c
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@ -0,0 +1,393 @@
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/* _sha_rom_idf5x.c — BearSSL drop‑in with ESP32 ROM SHA acceleration
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*
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* ⚠ TEST‑ONLY IMPLEMENTATION — SERIALIZED VIA GLOBAL SPINLOCK ⚠
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*
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* Overview:
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* ---------
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* - Provides BearSSL hash functions backed by the ESP32 ROM SHA engine.
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* - Uses a single global ROM SHA_CTX instance.
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* - Access is serialized with a global portMUX spinlock.
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*
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* Concurrency Warning:
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* --------------------
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* - This locking only prevents simultaneous entry into the ROM SHA engine.
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* - It does NOT make multiple concurrent hash contexts safe.
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* - Interleaving operations from different contexts will corrupt state.
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* - Only one hash context may be active at any given time.
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*
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* Platform Notes:
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* ---------------
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* - ESP32 (ESP_PLATFORM): Uses ROM SHA acceleration as described above.
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* - ESP8266 / other targets: This translation unit compiles to nothing;
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* stock BearSSL symbols are provided instead.
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*
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* SHA‑256 Limitation on ESP32:
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* ----------------------------
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* - The ESP32 ROM SHA‑256 implementation shares internal state with the
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* hardware engine; without pause/resume support, state cannot be saved
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* and restored safely.
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* - In this “single global context” model, running SHA‑256 concurrently
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* or interleaving with other operations will corrupt the ROM state.
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* - Therefore, SHA‑256 acceleration is only enabled when
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* SOC_SHA_SUPPORT_RESUME is available; otherwise it is unsafe here.
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* - When unsupported, SHA‑256 silently falls back to BearSSL’s software
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* implementation at build time (callers see no behavioral change).
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*
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* Supported ROM Algorithms (if present in ROM):
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* ----------------------------------------------
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* • SHA‑1
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* • SHA‑224
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* • SHA‑256 (see limitation and fallback above)
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* • SHA‑384
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* • SHA‑512
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*/
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#include "t_inner.h"
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#if defined(USE_SHA_ROM)
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#if defined(ESP_PLATFORM) && !defined(ESP8266)
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#include <stdint.h>
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#include <stddef.h>
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#include <string.h>
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#include "freertos/FreeRTOS.h"
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#if __has_include("soc/sha_caps.h")
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# include "soc/sha_caps.h"
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#elif __has_include("soc/soc_caps.h")
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# include "soc/soc_caps.h"
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#else
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# error "No SHA capability header found"
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#endif
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#if __has_include("esp_rom_sha.h")
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# include "esp_rom_sha.h"
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#elif __has_include("rom/sha.h")
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# include "rom/sha.h"
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#else
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# error "No ROM SHA header found"
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#endif
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#define HAVE_ROM_SHA1 (SOC_SHA_SUPPORT_SHA1)
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#define HAVE_ROM_SHA224 (SOC_SHA_SUPPORT_SHA224)
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#define HAVE_ROM_SHA256 (SOC_SHA_SUPPORT_SHA256)
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#define HAVE_ROM_SHA384 (SOC_SHA_SUPPORT_SHA384)
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#define HAVE_ROM_SHA512 (SOC_SHA_SUPPORT_SHA512)
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#if defined(SOC_SHA_SUPPORT_RESUME)
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/* Newer chips: mode passed to init, update has no mode */
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#define ROM_SHA_ENABLE() ets_sha_enable()
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#define ROM_SHA_DISABLE() ets_sha_disable()
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#define ROM_SHA_INIT_MODE(ctx, mode) ets_sha_init((ctx), (mode))
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#define ROM_SHA_UPDATE_MODE(ctx, mode, d, l, last) \
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ets_sha_update((ctx), (const unsigned char*)(d), (uint32_t)(l), (last))
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#define ROM_SHA_FINISH_MODE(ctx, mode, out) ets_sha_finish((ctx), (unsigned char*)(out))
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#define ROM_SHA_FINALIZE_MODE(ctx, mode, out) \
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do { ROM_SHA_UPDATE_MODE((ctx), mode, NULL, 0, true); ROM_SHA_FINISH_MODE((ctx), mode, (out)); } while (0)
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#else
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/* Old ESP32: mode passed to update/finish, init takes only ctx */
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#define ROM_SHA_ENABLE() ets_sha_enable()
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#define ROM_SHA_DISABLE() ets_sha_disable()
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#define ROM_SHA_INIT_MODE(ctx, mode) ets_sha_init((ctx))
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#define ROM_SHA_UPDATE_MODE(ctx, mode, d, l, last) \
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ets_sha_update((ctx), (mode), (const uint8_t*)(d), (size_t)((l) * 8))
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#define ROM_SHA_FINISH_MODE(ctx, mode, out) ets_sha_finish((ctx), (mode), (uint8_t*)(out))
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#define ROM_SHA_FINALIZE_MODE(ctx, mode, out) \
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do { ROM_SHA_UPDATE_MODE((ctx), mode, NULL, 0, true); ROM_SHA_FINISH_MODE((ctx), mode, (out)); } while (0)
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#endif
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/* One global ROM context; accesses serialized across cores/tasks. */
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static SHA_CTX rom_ctx;
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static portMUX_TYPE s_sha_mux = portMUX_INITIALIZER_UNLOCKED;
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#define SHA_ENTER() portENTER_CRITICAL(&s_sha_mux)
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#define SHA_EXIT() portEXIT_CRITICAL(&s_sha_mux)
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/* ================================================================
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* SHA-1 (ROM path, no save/restore)
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* ================================================================ */
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#if HAVE_ROM_SHA1
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void br_sha1_init(br_sha1_context *cc) {
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SHA_ENTER();
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cc->vtable = &br_sha1_vtable;
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cc->count = 0;
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ROM_SHA_ENABLE();
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ROM_SHA_INIT_MODE(&rom_ctx, SHA1);
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SHA_EXIT();
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}
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void br_sha1_update(br_sha1_context *cc, const void *data, size_t len) {
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if (!len) return;
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SHA_ENTER();
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ROM_SHA_UPDATE_MODE(&rom_ctx, SHA1, data, len, false);
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cc->count += len;
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SHA_EXIT();
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}
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void br_sha1_out(const br_sha1_context *cc, void *out) {
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(void)cc;
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SHA_ENTER();
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ROM_SHA_FINALIZE_MODE(&rom_ctx, SHA1, out);
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ROM_SHA_INIT_MODE(&rom_ctx, SHA1);
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SHA_EXIT();
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}
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const br_hash_class br_sha1_vtable PROGMEM = {
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sizeof(br_sha1_context),
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BR_HASHDESC_ID(br_sha1_ID)
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| BR_HASHDESC_OUT(20)
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| BR_HASHDESC_LBLEN(6)
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| BR_HASHDESC_MD_PADDING
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| BR_HASHDESC_MD_PADDING_BE,
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(void (*)(const br_hash_class **)) &br_sha1_init,
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(void (*)(const br_hash_class **, const void *, size_t)) &br_sha1_update,
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(void (*)(const br_hash_class *const *, void *)) &br_sha1_out,
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NULL,
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NULL
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};
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#endif
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/* ================================================================
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* SHA-224 (ROM path, no save/restore)
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* ================================================================ */
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/* ================================================================
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* SHA-224 (ROM path, no save/restore)
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* ================================================================ */
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#if HAVE_ROM_SHA224
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void br_sha224_init(br_sha224_context *cc) {
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SHA_ENTER();
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cc->vtable = &br_sha224_vtable;
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cc->count = 0;
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ROM_SHA_ENABLE();
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ROM_SHA_INIT_MODE(&rom_ctx, SHA2_224);
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SHA_EXIT();
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}
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void br_sha224_update(br_sha224_context *cc, const void *data, size_t len) {
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if (!len) return;
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SHA_ENTER();
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ROM_SHA_UPDATE_MODE(&rom_ctx, SHA2_224, data, len, false);
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cc->count += len;
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SHA_EXIT();
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}
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void br_sha224_out(const br_sha224_context *cc, void *out) {
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(void)cc;
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uint8_t tmp[32];
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SHA_ENTER();
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ROM_SHA_FINALIZE_MODE(&rom_ctx, SHA2_224, tmp);
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memcpy(out, tmp, 28);
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ROM_SHA_INIT_MODE(&rom_ctx, SHA2_224);
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SHA_EXIT();
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}
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const br_hash_class br_sha224_vtable PROGMEM = {
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sizeof(br_sha224_context),
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BR_HASHDESC_ID(br_sha224_ID)
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| BR_HASHDESC_OUT(28)
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| BR_HASHDESC_LBLEN(6)
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| BR_HASHDESC_MD_PADDING
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| BR_HASHDESC_MD_PADDING_BE,
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(void (*)(const br_hash_class **)) &br_sha224_init,
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(void (*)(const br_hash_class **, const void *, size_t)) &br_sha224_update,
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(void (*)(const br_hash_class *const *, void *)) &br_sha224_out,
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NULL,
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NULL
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};
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#endif /* HAVE_ROM_SHA224 */
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/* ================================================================
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* SHA-256 with ROM acceleration + per-blob replay save/restore
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* ================================================================ */
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#if HAVE_ROM_SHA256 && defined(SOC_SHA_SUPPORT_RESUME)
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#undef br_sha256_init
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#undef br_sha256_update
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#undef br_sha256_out
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#undef br_sha256_state
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#undef br_sha256_set_state
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#define S256_CAP 64
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/* Capture buffer for current context */
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static struct {
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uint8_t buf[S256_CAP];
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uint8_t len;
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} s256_capture;
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void br_sha256_init(br_sha256_context *cc)
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{
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SHA_ENTER();
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cc->vtable = &br_sha256_vtable;
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cc->count = 0;
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s256_capture.len = 0;
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ROM_SHA_ENABLE();
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ROM_SHA_INIT_MODE(&rom_ctx, SHA2_256);
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SHA_EXIT();
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}
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void br_sha256_update(br_sha256_context *cc, const void *data, size_t len)
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{
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if (!len) return;
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const uint8_t *dp = (const uint8_t *)data;
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SHA_ENTER();
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ROM_SHA_UPDATE_MODE(&rom_ctx, SHA2_256, dp, len, false);
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cc->count += len;
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if (s256_capture.len < S256_CAP) {
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size_t want = S256_CAP - s256_capture.len;
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size_t take = (len < want) ? len : want;
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memcpy(s256_capture.buf + s256_capture.len, dp, take);
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s256_capture.len += (uint8_t)take;
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}
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SHA_EXIT();
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}
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void br_sha256_out(const br_sha256_context *cc, void *out)
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{
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(void)cc;
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SHA_ENTER();
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ROM_SHA_FINALIZE_MODE(&rom_ctx, SHA2_256, out);
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ROM_SHA_INIT_MODE(&rom_ctx, SHA2_256);
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SHA_EXIT();
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}
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uint64_t br_sha256_state(const br_sha256_context *cc, void *dst)
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{
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/* Store exactly the captured bytes in the blob */
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memset(dst, 0, S256_CAP);
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memcpy(dst, s256_capture.buf, s256_capture.len);
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return cc->count;
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}
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void br_sha256_set_state(br_sha256_context *cc, const void *src, uint64_t count)
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{
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const uint8_t *sp = (const uint8_t *)src;
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SHA_ENTER();
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ROM_SHA_INIT_MODE(&rom_ctx, SHA2_256);
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if (count <= S256_CAP) {
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ROM_SHA_UPDATE_MODE(&rom_ctx, SHA2_256, sp, (size_t)count, false);
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cc->count = count;
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} else {
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cc->count = 0;
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s256_capture.len = 0;
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}
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SHA_EXIT();
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}
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const br_hash_class br_sha256_vtable PROGMEM = {
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sizeof(br_sha256_context),
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BR_HASHDESC_ID(br_sha256_ID)
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| BR_HASHDESC_OUT(32)
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| BR_HASHDESC_STATE(S256_CAP) /* store full ipad/opad block */
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| BR_HASHDESC_LBLEN(6)
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| BR_HASHDESC_MD_PADDING
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| BR_HASHDESC_MD_PADDING_BE,
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(void (*)(const br_hash_class **)) &br_sha256_init,
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(void (*)(const br_hash_class **, const void *, size_t)) &br_sha256_update,
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(void (*)(const br_hash_class *const *, void *)) &br_sha256_out,
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(uint64_t (*)(const br_hash_class *const *, void *)) &br_sha256_state,
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(void (*)(const br_hash_class **, const void *, uint64_t)) &br_sha256_set_state
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};
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#endif /* HAVE_ROM_SHA256 */
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/* ================================================================
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* SHA-384 (ROM path, no save/restore)
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* ================================================================ */
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#if HAVE_ROM_SHA384
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void br_sha384_init(br_sha384_context *cc) {
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SHA_ENTER();
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cc->vtable = &br_sha384_vtable;
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cc->count = 0;
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ROM_SHA_ENABLE();
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ROM_SHA_INIT_MODE(&rom_ctx, SHA2_384);
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SHA_EXIT();
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}
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void br_sha384_update(br_sha384_context *cc, const void *data, size_t len) {
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if (!len) return;
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SHA_ENTER();
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ROM_SHA_UPDATE_MODE(&rom_ctx, SHA2_384, data, len, false);
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cc->count += len;
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SHA_EXIT();
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}
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void br_sha384_out(const br_sha384_context *cc, void *out) {
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(void)cc;
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uint8_t tmp[64];
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SHA_ENTER();
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ROM_SHA_FINALIZE_MODE(&rom_ctx, SHA2_384, tmp);
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memcpy(out, tmp, 48);
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ROM_SHA_INIT_MODE(&rom_ctx, SHA2_384);
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SHA_EXIT();
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}
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const br_hash_class br_sha384_vtable PROGMEM = {
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sizeof(br_sha384_context),
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BR_HASHDESC_ID(br_sha384_ID)
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| BR_HASHDESC_OUT(48)
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| BR_HASHDESC_LBLEN(7)
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| BR_HASHDESC_MD_PADDING
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| BR_HASHDESC_MD_PADDING_BE,
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(void (*)(const br_hash_class **)) &br_sha384_init,
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(void (*)(const br_hash_class **, const void *, size_t)) &br_sha384_update,
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(void (*)(const br_hash_class *const *, void *)) &br_sha384_out,
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NULL,
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NULL
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};
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#endif
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/* ================================================================
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* SHA-512 (ROM path, no save/restore)
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* ================================================================ */
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#if HAVE_ROM_SHA512
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#undef br_sha512_update
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void br_sha512_init(br_sha512_context *cc) {
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SHA_ENTER();
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cc->vtable = &br_sha512_vtable;
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cc->count = 0;
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ROM_SHA_ENABLE();
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ROM_SHA_INIT_MODE(&rom_ctx, SHA2_512);
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SHA_EXIT();
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}
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void br_sha512_update(br_sha512_context *cc, const void *data, size_t len) {
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if (!len) return;
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SHA_ENTER();
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ROM_SHA_UPDATE_MODE(&rom_ctx, SHA2_512, data, len, false);
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cc->count += len;
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SHA_EXIT();
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}
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void br_sha512_out(const br_sha512_context *cc, void *out) {
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(void)cc;
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SHA_ENTER();
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ROM_SHA_FINALIZE_MODE(&rom_ctx, SHA2_512, out);
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ROM_SHA_INIT_MODE(&rom_ctx, SHA2_512);
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SHA_EXIT();
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}
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const br_hash_class br_sha512_vtable PROGMEM = {
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sizeof(br_sha512_context),
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BR_HASHDESC_ID(br_sha512_ID)
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| BR_HASHDESC_OUT(64)
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| BR_HASHDESC_LBLEN(7)
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| BR_HASHDESC_MD_PADDING
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| BR_HASHDESC_MD_PADDING_BE,
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(void (*)(const br_hash_class **)) &br_sha512_init,
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(void (*)(const br_hash_class **, const void *, size_t)) &br_sha512_update,
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(void (*)(const br_hash_class *const *, void *)) &br_sha512_out,
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NULL,
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NULL
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};
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#endif
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#else
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/* ===== ESP8266 - leave it unchanged ===== */
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#endif
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#endif //USE_SHA_ROM
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@ -30,6 +30,7 @@ build_flags = ${esp_defaults.build_flags}
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-Dsint16_t=int16_t
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-Dmemcpy_P=memcpy
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-Dmemcmp_P=memcmp
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-DUSE_SHA_ROM
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;for TLS we can afford compiling for 4K RSA keys
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-DUSE_4K_RSA
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-I$PROJECT_DIR/include
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