Add GPIOViewer partition info
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@ -113,7 +113,8 @@ const char WIFI_HOSTNAME[] = WIFI_DEFAULT_HOSTNAME; // Override by user_confi
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#ifndef ARDUINO_ESP8266_RELEASE
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#ifndef ARDUINO_ESP8266_RELEASE
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#define ARDUINO_CORE_RELEASE "STAGE"
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#define ARDUINO_CORE_RELEASE "STAGE"
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#else
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#else
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#define ARDUINO_CORE_RELEASE ARDUINO_ESP8266_RELEASE
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//#define ARDUINO_CORE_RELEASE ARDUINO_ESP8266_RELEASE // 2_7_8
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#define ARDUINO_CORE_RELEASE "2.7.8"
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#endif // ARDUINO_ESP8266_RELEASE
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#endif // ARDUINO_ESP8266_RELEASE
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#ifndef USE_ADC_VCC
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#ifndef USE_ADC_VCC
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@ -194,7 +195,8 @@ const char WIFI_HOSTNAME[] = WIFI_DEFAULT_HOSTNAME; // Override by user_confi
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#ifndef ARDUINO_ESP32_RELEASE
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#ifndef ARDUINO_ESP32_RELEASE
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#define ARDUINO_CORE_RELEASE "STAGE"
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#define ARDUINO_CORE_RELEASE "STAGE"
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#else
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#else
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#define ARDUINO_CORE_RELEASE ARDUINO_ESP32_RELEASE
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//#define ARDUINO_CORE_RELEASE ARDUINO_ESP32_RELEASE // 3_3_0
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#define ARDUINO_CORE_RELEASE ESP_ARDUINO_VERSION_STR // 3.3.0
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#endif // ARDUINO_ESP32_RELEASE
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#endif // ARDUINO_ESP32_RELEASE
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#ifdef USE_I2C_BUS2 // If defined for ESP8266 undefine first
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#ifdef USE_I2C_BUS2 // If defined for ESP8266 undefine first
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@ -1035,7 +1035,7 @@ void CmndStatus(void)
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ESP_getFlashChipSize()/1024, ESP.getFlashChipRealSize()/1024
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ESP_getFlashChipSize()/1024, ESP.getFlashChipRealSize()/1024
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#endif // ESP8266
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#endif // ESP8266
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, ESP_getFlashChipId()
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, ESP_getFlashChipId()
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, ESP.getFlashChipSpeed()/1000000);
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, ESP_getFlashChipSpeed()/1000000);
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ResponseAppendFeatures();
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ResponseAppendFeatures();
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XsnsDriverState();
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XsnsDriverState();
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ResponseAppend_P(PSTR(",\"Sensors\":"));
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ResponseAppend_P(PSTR(",\"Sensors\":"));
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@ -8,7 +8,7 @@
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#ifdef ESP32
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#ifdef ESP32
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/*********************************************************************************************\
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/*********************************************************************************************\
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* ESP32, ESP32-S2, ESP32-S3, ESP32-C2, ESP32-C3, ESP32-C6 and ESP32-H2 Support
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* ESP32, ESP32-C2, ESP32-C3, ESP32-C5, ESP32-C6, ESP32-H2, ESP32-P4, ESP32-S2 and ESP32-S3 Support
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\*********************************************************************************************/
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\*********************************************************************************************/
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// 11b 11g 11n 11n 11ax
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// 11b 11g 11n 11n 11ax
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@ -16,54 +16,80 @@ const static char kWifiPhyMode[] PROGMEM = "low rate|11b|11g|HT20|HT40|HE20"; //
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#include "soc/soc.h"
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#include "soc/soc.h"
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#include "soc/spi_reg.h"
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#include "soc/spi_reg.h"
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// See libraries\ESP32\examples\ResetReason.ino
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#include "esp_chip_info.h"
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#include <nvs.h>
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#include "Esp.h"
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#include "spi_flash_mmap.h"
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#include <memory>
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#include <soc/soc.h>
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#include <soc/efuse_reg.h>
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#include <esp_partition.h>
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extern "C" {
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#include "esp_ota_ops.h"
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#include "esp_image_format.h"
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}
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#include "esp_system.h"
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#include "esp_flash.h"
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#include "bootloader_common.h"
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// ESP32_ARCH contains the name of the architecture (used by autoconf)
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// ESP32_ARCH contains the name of the architecture (used by autoconf)
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#if CONFIG_IDF_TARGET_ESP32
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// Flash memory mapping - See Esp.cpp
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#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
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#ifdef CORE32SOLO1
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#ifdef CORE32SOLO1
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#define ESP32_ARCH "esp32solo1"
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#define ESP32_ARCH "esp32solo1"
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#else
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#else
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#define ESP32_ARCH "esp32"
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#define ESP32_ARCH "esp32"
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#endif
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#endif
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#include "esp32/rom/rtc.h"
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#include "esp32/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x1000 // Flash offset containing magic flash size and spi mode
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#elif CONFIG_IDF_TARGET_ESP32S2
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define ESP32_ARCH "esp32s2"
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#define ESP32_ARCH "esp32s2"
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#include "esp32s2/rom/rtc.h"
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#include "esp32s2/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x1000 // Flash offset containing magic flash size and spi mode
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#elif CONFIG_IDF_TARGET_ESP32S3
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define ESP32_ARCH "esp32s3"
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#define ESP32_ARCH "esp32s3"
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#include "esp32s3/rom/rtc.h"
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#include "esp32s3/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32s3 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32C2
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#elif CONFIG_IDF_TARGET_ESP32C2
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#define ESP32_ARCH "esp32c2"
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#define ESP32_ARCH "esp32c2"
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#include "esp32c2/rom/rtc.h"
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#include "esp32c2/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c2 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32C3
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#elif CONFIG_IDF_TARGET_ESP32C3
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#define ESP32_ARCH "esp32c3"
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#define ESP32_ARCH "esp32c3"
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#include "esp32c3/rom/rtc.h"
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#include "esp32c3/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c3 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32C5
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#elif CONFIG_IDF_TARGET_ESP32C5
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#define ESP32_ARCH "esp32c5"
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#define ESP32_ARCH "esp32c5"
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#include "esp32c5/rom/rtc.h"
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#include "esp32c5/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32c5 is located at 0x2000
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#elif CONFIG_IDF_TARGET_ESP32C6
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#elif CONFIG_IDF_TARGET_ESP32C6
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#define ESP32_ARCH "esp32c6"
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#define ESP32_ARCH "esp32c6"
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#include "esp32c6/rom/rtc.h"
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#include "esp32c6/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c6 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32H2
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#elif CONFIG_IDF_TARGET_ESP32H2
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#define ESP32_ARCH "esp32h2"
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#define ESP32_ARCH "esp32h2"
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#include "esp32h2/rom/rtc.h"
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#include "esp32h2/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32h2 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32P4
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#elif CONFIG_IDF_TARGET_ESP32P4
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#define ESP32_ARCH "esp32p4"
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#define ESP32_ARCH "esp32p4"
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#include <esp_phy_init.h>
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#include "esp32p4/rom/rtc.h"
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#include "esp32p4/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32p4 is located at 0x2000
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#else
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#else
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#define ESP32_ARCH ""
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#define ESP32_ARCH ""
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#endif
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// See libraries\ESP32\examples\ResetReason.ino
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#include "esp_chip_info.h"
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#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
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#include "esp32/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32S2 // ESP32-S2
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#include "esp32s2/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32S3 // ESP32-S3
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#include "esp32s3/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32C2 // ESP32-C2
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#include "esp32c2/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32C3 // ESP32-C3
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#include "esp32c3/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32C5 // ESP32-C5
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#include "esp32c5/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32C6 // ESP32-C6
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#include "esp32c6/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32H2 // ESP32-H2
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#include "esp32h2/rom/rtc.h"
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#elif CONFIG_IDF_TARGET_ESP32P4 // ESP32-P4
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#include "esp32p4/rom/rtc.h"
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#else
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#error Target CONFIG_IDF_TARGET is not supported
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#error Target CONFIG_IDF_TARGET is not supported
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#endif
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#endif
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@ -72,14 +98,8 @@ size_t getArduinoLoopTaskStackSize(void) {
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return SET_ESP32_STACK_SIZE;
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return SET_ESP32_STACK_SIZE;
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}
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}
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#ifndef CONFIG_IDF_TARGET_ESP32P4
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#include <esp_phy_init.h>
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#endif
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// Handle 20k of NVM
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// Handle 20k of NVM
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#include <nvs.h>
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bool NvmExists(const char *sNvsName) {
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bool NvmExists(const char *sNvsName) {
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nvs_handle_t handle;
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nvs_handle_t handle;
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if (nvs_open(sNvsName, NVS_READONLY, &handle) != ESP_OK) {
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if (nvs_open(sNvsName, NVS_READONLY, &handle) != ESP_OK) {
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@ -219,57 +239,6 @@ void NvsInfo(void) {
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nvs_stats.used_entries, nvs_stats.total_entries, nvs_stats.namespace_count);
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nvs_stats.used_entries, nvs_stats.total_entries, nvs_stats.namespace_count);
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}
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}
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//
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// Flash memory mapping
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//
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// See Esp.cpp
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#include "Esp.h"
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#include "spi_flash_mmap.h"
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#include <memory>
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#include <soc/soc.h>
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#include <soc/efuse_reg.h>
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#include <esp_partition.h>
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extern "C" {
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#include "esp_ota_ops.h"
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#include "esp_image_format.h"
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}
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#include "esp_system.h"
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#include "esp_flash.h"
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#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
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#include "esp32/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x1000 // Flash offset containing magic flash size and spi mode
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#elif CONFIG_IDF_TARGET_ESP32S2 // ESP32-S2
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#include "esp32s2/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x1000 // Flash offset containing magic flash size and spi mode
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#elif CONFIG_IDF_TARGET_ESP32S3 // ESP32-S3
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#include "esp32s3/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32s3 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32C2 // ESP32-C2
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#include "esp32c2/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c2 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32C3 // ESP32-C3
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#include "esp32c3/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c3 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32C5 // ESP32-C5
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#include "esp32c5/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32c5 is located at 0x2000
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#elif CONFIG_IDF_TARGET_ESP32C6 // ESP32-C6
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#include "esp32c6/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c6 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32H2 // ESP32-H2
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#include "esp32h2/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32h2 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32P4 // ESP32-P4
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#include "esp32p4/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32p4 is located at 0x2000
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#else
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#error Target CONFIG_IDF_TARGET is not supported
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#endif
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#include "bootloader_common.h"
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uint32_t EspProgramSize(const char *label) {
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uint32_t EspProgramSize(const char *label) {
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const esp_partition_t *part = esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_ANY, label);
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const esp_partition_t *part = esp_partition_find_first(ESP_PARTITION_TYPE_APP, ESP_PARTITION_SUBTYPE_ANY, label);
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if (!part) {
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if (!part) {
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@ -582,6 +551,14 @@ uint8_t* FlashDirectAccess(void) {
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return data;
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return data;
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}
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}
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uint32_t ESP_getFlashChipSpeed(void) {
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#if ESP_ARDUINO_VERSION >= ESP_ARDUINO_VERSION_VAL(3, 3, 2)
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return ESP.getFlashFrequencyMHz() * 1000000;
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#else
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return ESP.getFlashChipSpeed(); // In Hz
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#endif
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}
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uint32_t ESP_getPsramSize(void) {
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uint32_t ESP_getPsramSize(void) {
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return ESP.getPsramSize();
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return ESP.getPsramSize();
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}
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}
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@ -120,6 +120,10 @@ uint32_t ESP_getFlashChipSize(void) {
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return ESP.getFlashChipSize();
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return ESP.getFlashChipSize();
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}
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}
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uint32_t ESP_getFlashChipSpeed(void) {
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return ESP.getFlashChipSpeed();
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}
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uint32_t ESP_getPsramSize(void) {
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uint32_t ESP_getPsramSize(void) {
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return 0;
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return 0;
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}
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}
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@ -374,7 +374,7 @@ void GVHandleEspInfo(void) {
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appendField("flash_chip_size", String(ESP.getFlashChipRealSize()), false);
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appendField("flash_chip_size", String(ESP.getFlashChipRealSize()), false);
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#endif
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#endif
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appendField("flash_chip_speed", String(ESP.getFlashChipSpeed()), false);
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appendField("flash_chip_speed", String(ESP_getFlashChipSpeed()), false);
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appendField("heap_size", String(ESP_getHeapSize()), false);
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appendField("heap_size", String(ESP_getHeapSize()), false);
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appendField("heap_max_alloc", String(ESP_getMaxAllocHeap()), false);
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appendField("heap_max_alloc", String(ESP_getMaxAllocHeap()), false);
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appendField("psram_size", String(ESP_getPsramSize()), false);
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appendField("psram_size", String(ESP_getPsramSize()), false);
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@ -441,6 +441,7 @@ void GVHandlePartition(void) {
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String jsonResponse = "["; // Start of JSON array
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String jsonResponse = "["; // Start of JSON array
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#ifdef ESP32
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#ifdef ESP32
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bool firstEntry = true; // Used to format the JSON array correctly
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bool firstEntry = true; // Used to format the JSON array correctly
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const esp_partition_t *cur_part = esp_ota_get_running_partition();
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auto appendPartitions = [&](esp_partition_type_t type) {
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auto appendPartitions = [&](esp_partition_type_t type) {
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esp_partition_iterator_t iter = esp_partition_find(type, ESP_PARTITION_SUBTYPE_ANY, NULL);
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esp_partition_iterator_t iter = esp_partition_find(type, ESP_PARTITION_SUBTYPE_ANY, NULL);
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@ -455,7 +456,20 @@ void GVHandlePartition(void) {
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// Append partition information in JSON format
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// Append partition information in JSON format
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jsonResponse += "{";
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jsonResponse += "{";
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jsonResponse += "\"label\":\"" + String(partition->label) + "\",";
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// jsonResponse += "\"label\":\"" + String(partition->label) + "\",";
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String label = partition->label;
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if (label == "spiffs") {
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label = "littlefs";
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}
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else if ((label == "app0") || (label == "app1")) {
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if (label = String(cur_part->label)) {
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label = "tasmota-" + String(CODE_IMAGE_STR);
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label.toLowerCase();
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}
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}
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jsonResponse += "\"label\":\"" + label + "\",";
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jsonResponse += "\"type\":" + String(partition->type) + ",";
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jsonResponse += "\"type\":" + String(partition->type) + ",";
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jsonResponse += "\"subtype\":" + String(partition->subtype) + ",";
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jsonResponse += "\"subtype\":" + String(partition->subtype) + ",";
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jsonResponse += "\"address\":\"0x" + String(partition->address, HEX) + "\",";
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jsonResponse += "\"address\":\"0x" + String(partition->address, HEX) + "\",";
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